CAD for VLSI Design

CAD for VLSI Design, Spring 2002

ANNOUNCEMENT

Please move to new site about this course.
(May 31) The final exam is scheduled on Jun. 13 (Thu) at E1-110.
(Apr. 11) The course on 5/1 will be canceled for IC contest.
(Mar. 25) The course on 3/27 will be canceled.
(Mar. 14) The course on 3/20 will be canceled.
(Feb. 22) The classroom for the course on Wednesday is changed to E1-109.
(Feb. 21) The course on 2/27 will be canceled.
(Feb. 21) The course on Friday are moved to Wednesday 14:00-14:50 at E1-108.
(Feb. 21) The courses on 2/28 are moved to 2/22 10:00-12:00 at E1-107.

INSTRUCTOR: Chien-Nan Liu

Chien-Nan's Homepage
E-mail Chien-Nan at jimmy@ee.ncu.edu.tw

TEACHING ASSISTANT

to be announced ...

COURSE SCHEDULE

Introduction to CAD tools in the VLSI design flow (1 week)
Logic and switch level simulation (2 weeks)
Logic Synthesis (4 weeks)
Floorplanning and placement (2 weeks)
Routing (2 weeks)
Layout data structure (2 weeks)
Project presentation (2 weeks)

LECTURE NOTES

Syllabus (Feb. 19, 2002)
lecture 1 (Introduction, Feb. 19, 2002)
lecture 2 (Logic Simulation, Mar. 6, 2002)
lecture 3 (Transistor-Level Simulation, Mar. 14, 2002)
lecture 4 (HDL Synthesis, Apr. 24, 2002)

HOMEWORKS AND PROJECTS

Program Assignment 1 (Due: Apr. 29, 2002)
Program Assignment 2 (Due: May 20, 2002)
Final Project (Due: Jan. 6, 2002)

OTHER INFORMATION

Research Groups on Design Automation
Conferences Related to Design Automation
Journals related to Design Automation
ACM web site
ACM SIGDA (Special Interest Group on Design Automation)
ACM Transactions on Design Automation of Electronic Systems
ACM/SIGDA Newsletters
IEEE web site
IEEE Computer Society
IEEE Spectrum
Electronic Design Automation (EDA) Companies
Chip Implementation Center (CIC), Taiwan
Electronic Engineering Times/Taiwan web site
Electronic Engineering Times Online
Electronic Buyers' News web site
EDN-Asia web site
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For any questions, send e-mails to jimmy@ee.ncu.edu.tw

Last modified: May 31, 2002