國立中央大學_電機工程學系_薛木添

國立中央大學電機工程學系

Department Of Electrical Engineering National Central University

薛木添助理教授

Dept. of Electrical Engineering National Central University
Jung-Li, TaoYuan 320 Taiwan, R.O.C.

Office: E1-331 Tel: + 886-3-4227151 ext: 4531 FAX: + 886-3-4255830

專長與研究興趣：

VLSI Architecture and System Design for Digital Communication Systems, Broadband transmission systems, Adaptive Signal Processing and Systems, Synchronization techniques, and Integrated Circuit Designs

學歷：

1993-1998 中央大學電機工程研究所：電機工程博士

1987-1989 交通大學控制工程研究所：控制工程碩士

1982-1986 台灣師範大學工教系電子科：教育學士

經歷：

2001-迄今誠致科技技術總監 (CTO)

2000-2001 凱訊電子(改名九暘電子)廣域網路事業部技術總監

1998-2000 工研院電通所工程師

1997-1998 工研院電通所顧問

1996-1997 DAVICOM Semiconductor (聯傑) 顧

1989-1996 中華電信研究所助理研究員

著作 :

I. Journal Papers:

[1] Muh-Tian Shiue, Chorng-Kuang Wang, and Winston I. Way, “A VLSI architecture design for dual-mode the QAM and VSB digital CATV transceiver,” IEICE Special Section on the Latest Development of Telecommunication Research, Dec. 1998.

[2] Chorng-Kuang Wang, C. M. Lin and Muh-Tian Shiue, "Automatic Gain Control VLSI for ADSL-1 CAP systems", Transactions of Chinese Institute of Engineers, vol. 3, NO. 3, pp. 261-268, 1996

II. Conference Papers:

[1] Chien-Chih Lin, Muh-Tian Shiue, and Chorng-Kuang Wang, "A Dual-Loop Automatic Gain Control for Infrared Communication System", IEEE AP-ASIC, Taipei, Taiwan, Aug., 2002

[2] Keng-Yi Su, Muh-Tian Shiue, and Chorng-Kuang Wang, "All Digital CDMA Upstream Transmitter and Baseband VLSI Design of Head-End Receiver for Upstream Cab", IEEE AP-ASIC, Taipei, Taiwan, Aug., 2002

[3] Ching-Chi Chang, Muh-Tian Shiue, and Chorng-Kuang Wang, "A VLSI Architecture of DMT Based Transceiver for VDSL System", IEEE AP-ASIC, Taipei, Taiwan, Aug., 2002

[4] S. J. Jou, H. Y. Lin, Muh-Tian Shiue, J. Y. Heh and C. K. Wang, “Design of Carrier Recovery for QAM/VSB Dual Mode,” IEEE International Conference of Communications, Circuits and Systems, June 2002, pp.1535-1539.

[5] Ching-Chi Chang, Chien-Chih Lin, Muh-Tian Shiue, and Chorng-Kuang Wang, "A Wide Pull-in Range Fast Acquisition Hardware-Sharing Two-Fold Carrier Recovery Loop", IEEE ISCAS, Sydney, Australia, 2001

[6] Wei-Cherng Liao, Jia-Soy CHuang, Muh-Tian Shiue, and Chorng-Kuang Wang, "An FH-SS GFSK Low-IF Receiver for Bluetooth", Proceedings of the 11th VLSI/CAD Symposium, Ping-Ton, Taiwan, Aug., 2000

[7] Chien-Chih Lin, Yu-Zieh Chang, Muh-Tian Shiue, and Chorng-Kuang Wang, "A Dual-Loop Automatic Gain Control for 10Mbps Infrared Communication System", Proceedings of the 11th VLSI/CAD Symposium, Ping-Ton, Taiwan, Aug., 2000

[8] Kuang-Hu Huang, Muh-Tian Shiue, and Chorng-Kuang Wang, "A 2V CMOS Dual-Bandwidth Fast Acquisition Automatic Gain Control Ampifier for Digital Cable Modem", IEEE AP-ASIC, Seoul, Korea, Aug., 1999

[9] C. F. Wu, Muh-Tian Shiue, C. C. Huang and S. J. Jou, “QAM/VSB dual mode equalizer design and implementation,” The first IEEE Asia Pacific Conference on ASICs, Seoul, Korea, August 1999, pp.323-326

[10] Shyh-Jye Jou, G. H. Kuo, Muh-Tian Shiue, Jung Yu Heh and Chorng-Kuang Wang, “VLSI Implementation of Timing Recovery and Carrier Recovery for QAM/VSB Dual Mode,” 1999 International Symposium on VLSI Technology, Systems, and Applications, Taipei, Taiwan, VLSI/TSA’99, June 8 - 10, 1999.

[11] Muh-Tian Shiue, C. C. Lu, Chorng-Kuang Wang, and Winston I. Way, “A 64-QAM/8-VSB dual-mode modulator for hybrid fiber/coax CATV transmission,” The 9th VLSI Design/ CAD Symposium, pp. 481-484, Aug. 1998.

[12] Muh-Tian Shiue, K. H. Huang, C. C. Lu, Chorng-Kuang Wang, and Winston I. Way, “A VLSI design of dual-Loop automatic gain control for dual-mode QAM/VSB CATV transmission system,” Proc. IEEE Int. Symp. Circuits Syst., Monterey, California, May 31 - June 3, pp490 –493, 1998.

[13] Muh-Tian Shiue, K. H. Huang, Chorng-Kuang Wang, and Winston I. Way, “A VLSI architecture design for both the QAM and VSB digital CATV transceiver,” TJCOM98, Hsin-Chu, Taiwan, R.O.C., Jan. 20-22, 1998.

[14] Muh-Tian Shiue, K. H. Huang, C. C. Lu, Chorng-Kuang Wang, and Winston I. Way, “A digitized automatic gain Control with dual loops for both the QAM/VSB CATV transmission system," IEEE ISCOM97, Hsin-Chu, Taiwan, R.O.C., Dec. 1997.

[15] Muh-Tian Shiue, C. C. Lu, Chorng-Kuang Wang, and Winston I. Way, “A VLSI design of carrier recovery for both the 64-QAM and 8-VSB digital CATV modem,” The 8th VLSI Design/ CAD Symposium, pp. 101-104, Aug. 1997.

[16] K. H. Huang, Muh-Tian Shiue, Chorng-Kuang Wang, and Winston I. Way, “Automatic gain control VLSI architecture for frame-based PAM digital communication systems,” The 8th VLSI Design/ CAD Symposium, pp. 189-192, Aug. 1997.

[17] S. C. Yin, C. C. Su, Muh-Tian Shiue, L. Y. Huang, Chorng-Kuang Wang, S. J. Jou, and W. I. Way, "A new VSB modulation technique and shaping filter design", 1996 International Symposium on Circuits and Systems, Atlanta, GA, USA, May, 1996

[18] Muh-Tian Shiue and Chorng-Kuang Wang, "Design of multipurpose digital modulator", 1995 International Symposium on Communications, Taipei, Taiwan, R.O.C., pp. 886-892, DEC. 27-29, 1995.

[19] Chorng-Kuang Wang and Muh-Tian Shiue, "A CAP-based ADSL transceiver VLSI architecture design ", 1995 International Symposium on Communications, Taipei, Taiwan, R.O.C., pp. 658-664, DEC. 27-29, 1995.

[20] Muh-Tian Shiue, "Timing recovery technique for CAP-based ADSL transceiver", 1995 National Symposium on Communications, Chia-i, Taiwan, R.O.C., pp. 126-131, DEC. 20-21, 1994.

[21] Muh-Tian Shiue, "AGC, initial acquisition and timing recovery techniques for QAM ADSL transceiver ", 1993 Asia-Pacific Conference on Communications, KAIST, Taejon, Korea Taiwan, pp. 452-456, Aug. 25-27, 1993

[22] R. Y. Chen, S. C. Hsieh, S. C. Chao, Muh-Tian Shiue et al., "A digital signal processor chip for 2B1Q U-interface transceiver", 1993 International Symposium on Communications, Taiwan, R.O.C., Vol. 2, pp. 24-1 ~ 24-9, DEC. 1993.

[23] S. J. Cheng, Muh-Tian Shiue et al., "Analog front end circuit of DSX-H DSL transceiver", 1992 National Symposium on Communications, Chung-li, Taiwan, R.O.C., pp. 346-351, DEC. 23-24, 1992.

[24] W. J. Chiu, M. J. Wu, R. Y. Chen, S. C. Hsieh, S. C. Chao, Muh-Tian Shiue, et al., “Design and implementation of a U-DSP chip for ISDN 2B+D basic access,” 1991 Telecommunication Technology Symposium ROC-ROK, Nov. 26, 1991.

III. 專利 Patent

n 美國地區專利

[1] Muh-Tian Shiue, C. K. Wang, K. H. Huang, and P. C. Huang, “Relay-race FLL/PLL high-speed timing acquisition device”, USA, 5,917,351,1999

[2] C. I. Huang, D. W. Lin, S. G. Chen, and Muh-Tian Shiue, “A Low Complexity Blind Equalization”, pending.

n 中華民國專利

[1] 薛木添、汪重光、黃光虎、黃正壹

“可切換於正交振幅調變及單邊帶調變兩種數位通信系統之雙模數位傳送機、接收機及傳收機”，中華民國專利權證號：發明第093777號。

[2] 黃正壹、林大衛、陳紹基、薛木添

“低複雜度的盲目等化器”，中華民國專利權證號：發明第095830號。

[3] 薛木添、汪重光、黃光虎、黃柏鈞

“利用接力式鎖頻迴路及鎖相迴路之快速時序攫取裝置”，中華民國專利公告號：342559。

[4] 薛木添、汪重光、黃光虎、周世傑