前瞻記憶體研究室

2024

Enabling the wide memory window and long endurance in hafnia-based FeFET from the perspective of interfacial layer

Yu Tzu Tsai, Yu-Ting Chen, Cheng-Rui Liu, Sheng-Min Wang, Zheng-Kai Chen, Chia-shuo Pai, Zi-Rong Huang, Ying-Tsan Tang

Japanese Journal of Applied Physics

Tunable defect engineering of Mo/TiON electrode in angstrom-laminated HfO2/ZrO2 ferroelectric capacitors towards long endurance and high temperature retention

Sheng-Min Wang, Cheng-Rui Liu, Yu-Ting Chen, Shao-Chen Lee, Ying-Tsan Tang

Nanotechnology

2023

Atomistic simulations of thermal conductivity in novel GeC channel materials from first-principles molecular dynamics calculations

Shao-Chen Lee, Yu-Ting Chen, Cheng-Rui Liu, Sheng-Min Wang, Ying-Tsan Tang

Japanese Journal of Applied Physics

3-bits-per-cell 2T32CFE nvTCAM by Angstrom-laminated Ferroelectric Layers with 10¹¹ Cycles of Endurance and 4.92V of Ultra-wide Memory-windows for In-memory-searching

ER Hsieh, YT Tang, CR Liu, SM Wang, YL Hsueh, RQ Lin, YX Huang, YT Chen

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Ultra-Large Memory Window of 3.8V and 75% Read/Write Speed Improvement through Stressed Alumina and Angstrom-Laminated HfZrO2

Z-R Huang, S-M Wang, C-R Liu, Y-T Chen, Y-T Tsai, Z-K Chen, C-S Pai, YT Tang

2023 Silicon Nanoelectronics Workshop (SNW)

Theoretical Study of High Performance Germanium Nanowire Quantum Dot

Han-Wei Yang, Yung-Feng Wu, Ming-Jung Hsu, Shao-Chen Lee, Ying-Tsan Tang

2023 Silicon Nanoelectronics Workshop (SNW)

Physical Insights of Low Thermal Expansion Coefficient Electrode Stress Effect on Hafnia-Based Switching Speed

Y-T Tsai, C-R Liu, Y-T Chen, S-M Wang, Z-K Chen, C-S Pai, Z-R Haung, F-S Chang, Z-X Li, K-Y Hsiang, M-H Lee, YT Tang

arXiv preprint arXiv:2307.04404

2022

van der Waals epitaxy of 2D h-AlN on TMDs by atomic layer deposition at 250 °C

Chenming Hu Shu-Jui Chang,Shin-Yuan Wang,Yu-Che Huang,Jia Hao Chih,Yu-Ting Lai,Yi-Wei Tsai,Jhih-Min Lin,Chao-Hsin Chien,Ying-Tsan Tang

Applied Physics Letters, 162102

NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 1010 Cycles of Endurance, and Decade Lifetime at 103 °C

ER Hsieh, JK Chang, YT Tang, YJ Li, CW Liang, MY Lin, SY Huang, CJ Su, JC Guo, SS Chung

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Characterization of Double HfZrO2 based FeFET toward Low-Voltage Multi-Level Operation for High Density Nonvolatile Memory

Z-F Lou, C-Y Liao, K-Y Hsiang, C-Y Lin, Y-D Lin, P-C Yeh, C-Y Wang, H-Y Yang, P-J Tzeng, T-H Hou, Y-T Tang, MH Lee

2022 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)

2021

Visualizing Ferroelectric Uniformity of Hf1–x Zr x O2 Films Using X-ray Mapping

Shu-Jui Chang, Chih-Yu Teng, Yi-Jan Lin, Tsung-Mu Wu, Min-Hung Lee, Bi-Hsuan Lin, Mau-Tsu Tang, Tai-Sing Wu, Chenming Hu, Ethan Ying-Tsan Tang, Yuan-Chieh Tseng

ACS Applied Materials & Interfaces 13 (24), 29212–29221

NLS based Modeling and Characterization of Switching Dynamics for Antiferroelectric/Ferroelectric Hafnium Zirconium Oxides

YC Chen, KY Hsiang, YT Tang, MH Lee, P Su

2021 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4

Improving Edge Dead Domain and Endurance in Scaled HfZrOx FeRAM

Yu-De Lin, Po-Chun Yeh, Ying-Tsan Tang, Jian-Wei Su, Hsin-Yun Yang, Yu-Hao Chen, Chih-Pin Lin, Po-Shao Yeh, Jui-Chin Chen, Pei-Jer Tzeng, Min-Hung Lee, Tuo-Hung Hou, Shyh-Shyuan Sheu, Wei-Chung Lo, Chih-I Wu

2021 IEEE International Electron Devices Meeting (IEDM), 6.4. 1-6.4. 4

Deep insights into Interface Effects to achieve Low-voltage Operation (< 1.2 V), Low Process Temperature, and First-Principle Calculation

Y-T Tang, T-M Wu, C-L Fan, Y-M Lai, K-Y Hsiang, C-Y Liao, S-H Chang, T-Y Yu, P Su, M-T Chang, B-H Huang, C Hu, S-J Chang, M-F Chang, M-H Lee

2021 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), 1-2

2020

Pulse-Mediated Electronic Tuning of the MoS2–Perovskite Ferroelectric Field Effect Transistors

KW Chen, SJ Chang, EYT Tang, CP Lin, TH Hou, CH Chen, YC Tseng

ACS Applied Electronic Materials 2 (12), 3843-3852

2019

3D Scalable, Wake-up Free, and Highly Reliable FRAM Technology with Stress-Engineered HfZrOx

YD Lin, HY Lee, YT Tang, PC Yeh, HY Yang, PS Yeh, CY Wang, JW Su, SH Li, SS Sheu, TH Hou, WC Lo, MH Lee, MF Chang, YC King, CJ Lin

2019 IEEE International Electron Devices Meeting (IEDM), 15.3. 1-15.3. 4

A Comprehensive Kinetical Modeling of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Energy Effects on Negative Capacitance FETs

Y-T Tang, C-L Fan, Y-C Kao, Nicola Modolo, C-J Su, T-L Wu, K-H Kao, P-J Wu, S-W Hsaio, Artur Useinov, Pin Su, W-F Wu, G-W Huang, J-M Shieh, W-K Yeh, Y-H Wang

2019 Symposium on VLSI Technology

Self-organized pairs of Ge double quantum dots with tunable sizes and spacings enable room-temperature operation of qubit and single-electron devices

KP Peng, CL Chen, YT Tang, D Kuo, T George, HC Lin, PW Li

2019 IEEE International Electron Devices Meeting (IEDM), 37.4. 1-37.4. 4

Impact of Hafnium Oxide-Based Ferroelectric Material on Monolayer Black Phosphorus Transistor for Negative Capacitance and Memory Application

KT Chen, YF Chung, YT Tang, ST Chang, MH Lee

2019 International Conference on Solid State Devices and Materials (SSDM)

2018

A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node

Y-T Tang, C-J Su, Y-S Wang, K-H Kao, T-L Wu, P-J Sung, F-J Hou, C-J Wang, M-S Yeh, Y-J Lee, W-F Wu, Huang G-W, Shieh J-M, W-K Yeh, Y.-H Wang

2018 Symposium on VLSI Technology, 45-46

2017

Sub-60 mV/dec ferroelectric HZO MoS2negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance

M Si, C Jiang, CJ Su, YT Tang, L Yang, W Chung, MA Alam, PD Ye

2017 IEEE International Electron Devices Meeting (IEDM), 23.5. 1-23.5. 4

TSV-free FinFET-based Monolithic 3D+-IC with computing-in-memory SRAM cell for intelligent IoT devices

Fu-Kuo Hsueh, Hsiao-Yun Chiu, Chang-Hong Shen, Jia-Min Shieh, Ying-Tsan Tang, Chih-Chao Yang, Hsiu-Chih Chen, Wen-Hsien Huang, Bo-Yuan Chen, Kun-Ming Chen, Guo-Wei Huang, Wei-Hao Chen, Kuo-Hsiang Hsu, Srivatsa Rangachar Srinivasa, Nicholas Jao, Albert Lee, Hochul Lee, Vijaykrishnan Narayanan, Kang-Lung Wang, Meng-Fan Chang, Wen-Kuan Yeh

2017 IEEE International Electron Devices Meeting (IEDM), 12.6. 1-12.6. 4

Investigation of strain‐induced phase transformation in ferroelectric transistor using metal‐nitride gate electrode

YC Chiu, CH Cheng, CY Chang, YT Tang, MC Chen

physica status solidi (RRL)–Rapid Research Letters 11 (3), 1600368

Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION

C-J Su, Y-T Tang, Y-C Tsou, P-J Sung, F-J Hou, C-J Wang, S-T Chung, C-Y Hsieh, Y-S Yeh, F-K Hsueh, K-H Kao, S-S Chuang, C-T Wu, T-Y You, Y-L Jian, T-H Chou, Y-L Shen, B-Y Chen, G-L Luo, T-C Hong, K-P Huang, M-C Chen, Y-J Lee, T-S Chao, T-Y Tseng, W-F Wu, G-W Huang, J-M Shieh, W-K Yeh, Y-H Wang

2017 Symposium on VLSI Technology, T152-T153

Ge nanowire FETs with HfZrOx ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability

C-J Su, T-C Hong, Y-C Tsou, F-J Hou, P-J Sung, M-S Yeh, C-C Wan, K-H Kao, Y-T Tang, C-H Chiu, C-J Wang, S-T Chung, T-Y You, Y-C Huang, C-T Wu, K-L Lin, G-L Luo, K-P Huang, Y-J Lee, T-S Chao, W-F Wu, G-W Huang, J-M Shieh, W-K Yeh, Y-H Wang

2017 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4

Cover Picture: Investigation of strain‐induced phase transformation in ferroelectric transistor using metal‐nitride gate electrode (Phys. Status Solidi RRL 3/2017)

YC Chiu, CH Cheng, CY Chang, YT Tang, MC Chen

physica status solidi (RRL)–Rapid Research Letters 11 (3), 1770312

A Study of Ultralow Sheet Resistance and Homogenous Nickel Silicide by Low Thermal Budget Carbon Dioxide Laser Spike Annealing

Chen-Yen Hsieh

2016

One-transistor ferroelectric versatile memory: Strained-gate engineering for realizing energy-efficient switching and fast negative-capacitance operation

YC Chiu, CH Cheng, CY Chang, YT Tang, MC Chen

2016 IEEE Symposium on VLSI Technology, 1-2

A numerical study of Si-TMD contact with n/p type operation and interface barrier reduction for sub-5 nm monolayer MoS2FET

Ying-Tsan Tang, Kai-Shin Li, Lain-Jong Li, Ming-Yang Li, Chang-Hsien Lin, Yi-Ju Chen, Chun-Chi Chen, Chuan-Jung Su, Bo-Wei Wu, Cheng-San Wu, Min-Cheng Chen, Jia-Min Shieh, Wen-Kuan Yeh, Po-Cheng Su, Tahui Wang, Fu-Liang Yang, Chenming Hu

2016 IEEE International Electron Devices Meeting (IEDM), 14.3. 1-14.3. 4

A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET

Yi-Ju Chen, Ying-Tsan Tang, Chang-Hsien Lin, Chun-Chi Chen, Julian Duchaine, Yohann Spiegel, Frank Torregrossa, Laurent Roux, Jason Chen, Yun-Jie Wei, Yao-Ming Huang, Min-Chuan Hsiao, Yen-Chang Chen, Kai-Shin Li, Yao-Jen Lee, Min-Cheng Chen, Jia-Ming Shieh, Wen-Kuan Yeh

2016 21st International Conference on Ion Implantation Technology (IIT), 1-3